This invention relates generally to semiconductor integrated circuits and more particularly, it relates to a protection device for integrated circuits to prevent inadvertent damage caused by over-voltage transients such as electrostatic discharge.
It is generally known that the magnitude of an electric voltage allowed to be applied to an integrated circuit package is rather limited since the physical size of the integrated circuit package is fairly small. When the integrated circuit package is not being used, for example, in storage or handling, the external leads or pins thereof are susceptible to the build-up of a static charge thereon. If the integrated circuit package happens to come in contact with a ground potential, the accumulated static charges will flow to ground. Such static discharge can be of a catastrophic nature with sufficient energy to cause damage or even destroy the semiconductor element or chip mounted within the integrated circuit package.
In order to protect the semiconductor chip in the integrated circuit package from being destroyed when such static discharges occur, there has been provided in the prior art a protection element such as a transistor element or a p-n junction applied with a reverse bias, which breaks down when the semiconductor chip encounters an unexpectedly high voltage.
The present invention provides an improved protection device for integrated circuits which prevents inadvertent damage caused by over-voltage power surges. The protection device overlays the integrated circuit chip and is coupled to (i.e., is in direct or indirect electrical communication with) the bonding pads of the integrated circuit so as to not require any special processing of the integrated circuit chip to accommodate the protection device. The present invention comprises an insulating carrier having a ground plane thereon and a plurality of conductive pads thereon around a periphery of the ground plane. The plurality of conductive pads are spaced from the ground plane with a precision gap therebetween. When the protection device is placed over the integrated circuit chip, the plurality of conductive pads are coupled to the bonding pads of the integrated circuit and at least one of the conductive pads is coupled to ground.
In one aspect of the invention there is provided a surge protection device for an integrated circuit chip, the device having an insulating layer, a ground plane on the insulating layer, a plurality of conductive pads around the periphery of the ground plane for coupling to the bonding pads of the integrated circuit chip, the plurality of conductive pads being spaced a predetermined distance from the ground plane, and a ground pad coupled to the ground plane.
In another aspect of the invention there is provided an integrated circuit protected from inadvertent damage caused by over-voltage transients having a semiconductor body having a central portion with circuit elements therein, a plurality of bonding pads disposed around the central portion and coupled to the circuit elements and an insulating layer having a ground plane thereon over-laying the central portion and a portion of each of the bonding pads and a plurality of conductive pads on the insulating layer coupled to the bonding pads and spaced a predetermined distance from the ground plane.